bitkeeper revision 1.1236.49.1 (4249f373bNMSl7qxQlghqfQyK9POsg)

Simple global lVHPT support

diff --git a/xen/arch/ia64/Rules.mk b/xen/arch/ia64/Rules.mk
index 298514d40d9cd92b8a52489a018433cc1fa38768..651910e99b2b13840f052f153593a7295175cb6b 100644 (file)
--- a/xen/arch/ia64/Rules.mk
+++ b/xen/arch/ia64/Rules.mk
@@ -5,8 +5,8 @@ ifeq ($(COMPILE_ARCH),$(TARGET_ARCH))
 OBJCOPY = objcopy
 endif
 ifneq ($(COMPILE_ARCH),$(TARGET_ARCH))
-CC = /usr/local/sp_env/v2.2/i686/bin/ia64-unknown-linux-gcc
-LD = /usr/local/sp_env/v2.2/i686/bin/ia64-unknown-linux-ld
+CC = /usr/local/sp_env/v2.2.3/i686/bin/ia64-unknown-linux-gcc
+LD = /usr/local/sp_env/v2.2.3/i686/bin/ia64-unknown-linux-ld
 OBJCOPY = /usr/local/sp_env/v2.2/i686/bin/ia64-unknown-linux-objcopy
 endif
 HOSTCC := gcc

diff --git a/xen/arch/ia64/regionreg.c b/xen/arch/ia64/regionreg.c
index a09ac7572f431f108230509b18f70d0595bc41ec..bed58aec66d8b4e5af460cd470494e734103d945 100644 (file)
--- a/xen/arch/ia64/regionreg.c
+++ b/xen/arch/ia64/regionreg.c
@@ -189,7 +189,7 @@ int deallocate_rid_range(struct domain *d)
 //  it should be unmangled
 
 //This appears to work in Xen... turn it on later so no complications yet
-//#define CONFIG_MANGLE_RIDS
+#define CONFIG_MANGLE_RIDS
 #ifdef CONFIG_MANGLE_RIDS
 static inline unsigned long
 vmMangleRID(unsigned long RIDVal)

diff --git a/xen/arch/ia64/vcpu.c b/xen/arch/ia64/vcpu.c
index 15c9e343e098b7034c20561f1f93c2eca0b593c9..6439cdf3b51635b36ee55610b6534c2fd88f161b 100644 (file)
--- a/xen/arch/ia64/vcpu.c
+++ b/xen/arch/ia64/vcpu.c
@@ -1491,10 +1491,27 @@ void vcpu_itc_no_srlz(VCPU *vcpu, UINT64 IorD, UINT64 vaddr, UINT64 pte, UINT64
 
        // FIXME: validate ifa here (not in Xen space), COULD MACHINE CHECK!
        // FIXME, must be inlined or potential for nested fault here!
+       if ((vcpu->domain==dom0) && (logps < PAGE_SHIFT)) {
+               printf("vcpu_itc_no_srlz: domain0 use of smaller page size!\n");
+               //FIXME: kill domain here
+               while(1);
+       }
        psr = ia64_clear_ic();
        ia64_itc(IorD,vaddr,pte,ps); // FIXME: look for bigger mappings
        ia64_set_psr(psr);
        // ia64_srlz_i(); // no srls req'd, will rfi later
+#ifdef VHPT_GLOBAL
+       if (vcpu->domain==dom0 && ((vaddr >> 61) == 7)) {
+               // FIXME: this is dangerous... vhpt_flush_address ensures these
+               // addresses never get flushed.  More work needed if this
+               // ever happens.
+//printf("vhpt_insert(%p,%p,%p)\n",vaddr,pte,1L<<logps);
+               vhpt_insert(vaddr,pte,logps<<2);
+       }
+       // even if domain pagesize is larger than PAGE_SIZE, just put
+       // PAGE_SIZE mapping in the vhpt for now, else purging is complicated
+       else vhpt_insert(vaddr,pte,PAGE_SHIFT<<2);
+#endif
        if (IorD & 0x4) return;  // don't place in 1-entry TLB
        if (IorD & 0x1) {
                vcpu_set_tr_entry(&PSCB(vcpu,itlb),pte,ps<<2,vaddr);
@@ -1613,6 +1630,9 @@ IA64FAULT vcpu_ptc_e(VCPU *vcpu, UINT64 vadr)
        //  base = stride1 = stride2 = 0, count0 = count 1 = 1
 
        // FIXME: When VHPT is in place, flush that too!
+#ifdef VHPT_GLOBAL
+       vhpt_flush();   // FIXME: This is overdoing it
+#endif
        local_flush_tlb_all();
        // just invalidate the "whole" tlb
        vcpu_purge_tr_entry(&PSCB(vcpu,dtlb));
@@ -1632,6 +1652,9 @@ IA64FAULT vcpu_ptc_ga(VCPU *vcpu,UINT64 vadr,UINT64 addr_range)
        // FIXME: validate not flushing Xen addresses
        // if (Xen address) return(IA64_ILLOP_FAULT);
        // FIXME: ??breaks if domain PAGE_SIZE < Xen PAGE_SIZE
+#ifdef VHPT_GLOBAL
+       vhpt_flush_address(vadr,addr_range);
+#endif
        ia64_global_tlb_purge(vadr,vadr+addr_range,PAGE_SHIFT);
        vcpu_purge_tr_entry(&PSCB(vcpu,dtlb));
        vcpu_purge_tr_entry(&PSCB(vcpu,itlb));

diff --git a/xen/arch/ia64/vhpt.c b/xen/arch/ia64/vhpt.c
index e9c7e842ba6515035607f17662704de76646ad7c..976adce15c933bf755c3d36796fe8334a7b15a88 100644 (file)
--- a/xen/arch/ia64/vhpt.c
+++ b/xen/arch/ia64/vhpt.c
@@ -20,7 +20,7 @@ unsigned long vhpt_paddr, vhpt_pend, vhpt_pte;
 void vhpt_flush(void)
 {
        struct vhpt_lf_entry *v = (void *)VHPT_ADDR;
-       int i;
+       int i, cnt = 0;
 
        for (i = 0; i < VHPT_NUM_ENTRIES; i++, v++) {
                v->itir = 0;
@@ -31,6 +31,39 @@ void vhpt_flush(void)
        // initialize cache too???
 }
 
+#ifdef VHPT_GLOBAL
+void vhpt_flush_address(unsigned long vadr, unsigned long addr_range)
+{
+       unsigned long ps;
+       struct vhpt_lf_entry *vlfe;
+
+       if ((vadr >> 61) == 7) {
+               // no vhpt for region 7 yet, see vcpu_itc_no_srlz
+               printf("vhpt_flush_address: region 7, spinning...\n");
+               while(1);
+       }
+#if 0
+       // this only seems to occur at shutdown, but it does occur
+       if ((!addr_range) || addr_range & (addr_range - 1)) {
+               printf("vhpt_flush_address: weird range, spinning...\n");
+               while(1);
+       }
+//printf("************** vhpt_flush_address(%p,%p)\n",vadr,addr_range);
+#endif
+       while ((long)addr_range > 0) {
+               vlfe = (struct vhpt_lf_entry *)ia64_thash(vadr);
+               // FIXME: for now, just blow it away even if it belongs to
+               // another domain.  Later, use ttag to check for match
+//if (!(vlfe->ti_tag & INVALID_TI_TAG)) {
+//printf("vhpt_flush_address: blowing away valid tag for vadr=%p\n",vadr);
+//}
+               vlfe->ti_tag |= INVALID_TI_TAG;
+               addr_range -= PAGE_SIZE;
+               vadr += PAGE_SIZE;
+       }
+}
+#endif
+
 void vhpt_map(void)
 {
        unsigned long psr;

diff --git a/xen/arch/ia64/xenasm.S b/xen/arch/ia64/xenasm.S
index dc0771fa48d2301c19cd7d1cbccc1aea03933b12..9154339c9ffe6d15689d3bcbf2b0149f3d6963eb 100644 (file)
--- a/xen/arch/ia64/xenasm.S
+++ b/xen/arch/ia64/xenasm.S
@@ -465,3 +465,16 @@ static:    cmp.eq p7,p8=6,r32              /* PAL_PTCE_INFO */
 stacked:
        br.ret.sptk.few rp
 END(pal_emulator_static)
+
+GLOBAL_ENTRY(vhpt_insert)
+//     alloc loc0 = ar.pfs, 3, 1, 0, 0
+       mov r16=r32
+       mov r26=r33
+       mov r27=r34
+       ;;
+       VHPT_INSERT()
+//     VHPT_INSERT1()  ... add collision chains later
+//     mov ar.pfs = loc0
+       br.ret.sptk.few rp
+       ;;
+END(vhpt_insert)

diff --git a/xen/arch/ia64/xensetup.c b/xen/arch/ia64/xensetup.c
index 04d1cd5d6678b27e74e99db44b3bd4dcecc2464c..41420b8ce0d2c2836afee53d6793fa913351f8ef 100644 (file)
--- a/xen/arch/ia64/xensetup.c
+++ b/xen/arch/ia64/xensetup.c
@@ -309,7 +309,8 @@ printk("CONSTRUCTING DOMAIN0 CLONE #%d\n",i+1);
     /* The stash space for the initial kernel image can now be freed up. */
     init_domheap_pages(ia64_boot_param->initrd_start,
                       ia64_boot_param->initrd_start + ia64_boot_param->initrd_size);
-    scrub_heap_pages();
+    if (!running_on_sim)  // slow on ski and pages are pre-initialized to zero
+       scrub_heap_pages();
 
 printk("About to call init_trace_bufs()\n");
     init_trace_bufs();

diff --git a/xen/include/asm-ia64/config.h b/xen/include/asm-ia64/config.h
index c2b831a978599bee85be6555547c0b7b5155a7d1..1433104d369d5761316d350fe06514784c444f50 100644 (file)
--- a/xen/include/asm-ia64/config.h
+++ b/xen/include/asm-ia64/config.h
@@ -2,6 +2,7 @@
 #undef CLONE_DOMAIN0
 //#define CLONE_DOMAIN0 5
 #define DOMU_BUILD_STAGING
+#define VHPT_GLOBAL
 
 // manufactured from component pieces
 

diff --git a/xen/include/asm-ia64/vhpt.h b/xen/include/asm-ia64/vhpt.h
index e7f4a20406b228825e7cc870a0c55d14a01e8d5a..6fffb1500aa064c8107bed64e0fedd18b043b58f 100644 (file)
--- a/xen/include/asm-ia64/vhpt.h
+++ b/xen/include/asm-ia64/vhpt.h
@@ -19,6 +19,7 @@
 //#define      VHPT_NUM_ENTRIES                131072
 //#define      VHPT_CACHE_MASK                 131071
 //#define      VHPT_SIZE_LOG2                  22      //????
+#define        VHPT_CACHE_ENTRY_SIZE           64
 #define        VHPT_CACHE_NUM_ENTRIES          8192
 #define        VHPT_NUM_ENTRIES                524288
 #define        VHPT_CACHE_MASK                 524287
@@ -353,7 +354,7 @@ FindOne:;\
                and r23 = r23, r24;\
 \
 \
-               movl r17 = G_VHPT_Cache;\
+               movl r17 = VHPT_ADDR;\
                ;;\
 \
 \